Publications
Research Papers
General Purpose Deep Learning Accelerator Based On Bit Interleaving
Liang Chang, Hang Lu (路航), Chenglong Li, Xin Zhao, Zhicheng Hu, Jun Zhou, Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2024.
Mortar-FP8: Morphing the Existing FP32 Infrastructure for High Performance Deep Learning Acceleration
Hongyan Li, Hang Lu* (路航), Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2024.
Poseidon-NDP: Practical Fully Homomorphic Encryption Accelerator Based on Near Data Processing Architecture
Yinghao Yang, Hang Lu* (路航), Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2023.
Poseidon: Practical Homomorphic Encryption Accelerator
Yinghao Yang, Huaizhi Zhang, Shengyu Fan, Hang Lu* (路航), Mingzhe Zhang, Xiaowei Li
IEEE 29th International Symposium on High-Performance Computer Architecture (HPCA, CCF A类), 2023.
BitXpro: Regularity-aware Hardware Runtime Pruning for Deep Neural Networks
Hongyan Li, Hang Lu* (路航), Haoxuan Wang, Shengji Deng, Xiaowei Li
IEEE Transactions on Very Large Scale Integration Systems (TVLSI, CCF B类)，2023.
Mortar: Morphing the Bit Level Sparsity for General Purpose Deep Learning Acceleration
Yunhung Gao, Hongyan Li, Kevin Zhang, Xueru Yu, Hang Lu* (路航)
ACM 28th Asia and South Pacific Design Automation Conference (ASPDAC, CCF C类), 2023.
Distilling Bit-level Sparsity Parallelism for General Purpose Deep Learning Acceleration
Hang Lu (路航), Liang Chang, Chenglong Li, Zixuan Zhu, Shengjian Lu, Yanhuan Liu, Mingzhe Zhang
IEEE/ACM 54th International Symposium on Microarchitecture (MICRO, CCF A类)，2021.
Streamline Ring ORAM Accesses through Spatial and Temporal Optimization
Dingyuan Cao, Mingzhe Zhang, Hang Lu (路航), Xiaochun Ye, Dongrui Fan, Yuezhi Che, Rujia Wang
IEEE 27th International Symposium on High-Performance Computer Architecture (HPCA, CCF A类), 2021.
BitX: Empower Versatile Inference for Hardware Runtime Pruning
Hongyan Li, Hang Lu* (路航), Jiawen Huang, Wenxu Wang, Mingzhe Zhang, Wei Chen, Liang Chang, Xiaowei Li
IEEE/ACM 50th International Conference on Parallel Processing (ICPP, CCF B类)，2021.
Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks
Ning Lin, Xiaoming Chen, Hang Lu (路航), Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2021.
Architecting Effectual Computation for Machine Learning Accelerators
Hang Lu* (路航), Mingzhe Zhang, Yinhe Han, Qi Wang, Huawei Li, Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2020.
ShuttleNoC: Power-Adaptable Communication Infrastructure for Many-core Processors
Hang Lu* (路航), Yisong Chang, Ning Lin, Xin Wei, Guihai Yan, Xiaowei Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD, CCF A类), 2019.
HeadStart: Enforce Optimal Inceptions in Pruning Deep Convolutional Neural Networks for Efficient Inference on GPGPUs
Ning Lin, Hang Lu* (路航), Xin Wei, Xiaowei Li
IEEE/ACM 56th International Design Automation Conference (DAC, CCF A类), 2019.
When Deep Learning Meets the Edge: Auto-Masking Deep Neural Networks for Efficient Machine Learning on Edge Devices
Ning Lin, Hang Lu* (路航), Xing Hu, Jingliang Gao, Xiaowei Li
IEEE 37th International Conference on Computer Design (ICCD, CCF B类), 2019.
VNet: A Versatile Deep Neural Network Model for Efficient Semantic Segmentation
Ning Lin, Hang Lu* (路航), Xiaowei Li,
IEEE 37th International Conference on Computer Design (ICCD, CCF B类), 2019.
Tetris: Re-architecting Convolutional Neural Network Computation for Machine Learning Accelerators
Hang Lu* (路航), Xin Wei, Ning Lin, Guihai Yan, Xiaowei Li
IEEE/ACM 37th International Conference on Computer-Aided Design (ICCAD, CCF B类), 2018.
Redeeming Chip-level Power Efficiency by Collaborative Management of the Computation and Communication
Ning Lin, Hang Lu* (路航), Xin Wei, Xiaowei Li
ACM 24th Asia and South Pacific Design Automation Conference (ASPDAC, CCF C类), 2018.
PowerTrader: Enforcing Autonomous Power Management for Large-scale Many-core Processors
Hang Lu* (路航), Guihai Yan, Yinhe Han, Xiaowei Li
IEEE Transactions on Multi-scale Computing Systems (TMSCS), 2017.
RISO: Enforce Non-interfered Performance with Relaxed Network-on-Chip Isolation in Manycore Cloud Processors
Hang Lu* (路航), Binzhang Fu, Ying Wang, Yinhe Han, Guihai Yan, Xiaowei Li
IEEE Transactions on Very Large Scale Integration Systems (TVLSI, CCF B类), 2015.
ShuttleNoC: Boosting On-chip Communication Efficiency Through Localized Power Adaptation
Hang Lu* (路航), Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li
IEEE 20th Asia and South Pacific Design Automation Conference (ASPDAC, CCF C类，“最佳论文奖”提名), 2015.
RISO: Relaxed Networks-on-Chip Isolation for Cloud Processors
Hang Lu* (路航), Guihai Yan, Yinhe Han, Binzhang Fu, Xiaowei Li
IEEE/ACM 50th International Design Automation Conference (DAC, CCF A类), 2013.
Books
《多核处理器设计优化——低功耗、高可靠、易测试》，科学出版社，2021.
李晓维、路航、李华伟、王颖、鄢贵海 著
《Customizable Computing，可定制计算》，机械工业出版社，2018.
鄢贵海、叶靖、王颖、路航、卢文岩、李家军、吴靖雅 译，Yu-Ting Chen, Jason Cong, Michael Gill, Glenn Reinman, Bingjun Xiao 著